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PIC24FJ64GA705 Datasheet, PDF (57/412 Pages) –
PIC24FJ256GA705 FAMILY
TABLE 4-13: EDS MEMORY ADDRESS WITH DIFFERENT PAGES AND ADDRESSES
DSRPAG
(Data Space Read
Register)
DSWPAG
(Data Space Write
Register)
Source/Destination
Address while
Indirect
Addressing
24-Bit EA
Pointing to EDS
Comment
x(1)
x(1)
0000h to 1FFFh
000000h to
Near Data Space(2)
001FFFh
2000h to 7FFFh
002000h to
007FFFh
001h
001h
008000h to
00FFFEh
002h
002h
010000h to
017FFEh
003h
•
•
•
•
•
1FFh
003h
•
•
•
•
•
1FFh
8000h to FFFFh
018000h to
0187FEh
•
•
•
•
FF8000h to
FFFFFEh
EPMP Memory Space
000h
000h
Invalid Address Address Error Trap(3)
Note 1:
2:
3:
If the source/destination address is below 8000h, the DSRPAG and DSWPAG registers are not considered.
This Data Space can also be accessed by Direct Addressing.
When the source/destination address is above 8000h and DSRPAG/DSWPAG are ‘0’, an address error
trap will occur.
4.2.6 SOFTWARE STACK
Apart from its use as a Working register, the W15
register in PIC24F devices is also used as a Software
Stack Pointer (SSP). The pointer always points to the
first available free word and grows from lower to higher
addresses. It pre-decrements for stack pops and post-
increments for stack pushes, as shown in Figure 4-6.
Note that for a PC push during any CALL instruction,
the MSB of the PC is zero-extended before the push,
ensuring that the MSB is always clear.
Note:
A PC push during exception processing
will concatenate the SRL register to the
MSB of the PC prior to the push.
The Stack Pointer Limit Value register (SPLIM), associ-
ated with the Stack Pointer, sets an upper address
boundary for the stack. SPLIM is uninitialized at Reset.
As is the case for the Stack Pointer, SPLIM<0> is
forced to ‘0’ as all stack operations must be word-
aligned. Whenever an EA is generated using W15 as a
source or destination pointer, the resulting address is
compared with the value in SPLIM. If the contents of
the Stack Pointer (W15) and the SPLIM register are
equal, and a push operation is performed, a stack error
trap will not occur. The stack error trap will occur on a
subsequent push operation. Thus, for example, if it is
desirable to cause a stack error trap when the stack
grows beyond address 2000h in RAM, initialize the
SPLIM with the value, 1FFEh.
Similarly, a Stack Pointer underflow (stack error) trap is
generated when the Stack Pointer address is found to
be less than 0800h. This prevents the stack from
interfering with the SFR space.
A write to the SPLIM register should not be immediately
followed by an indirect read operation using W15.
FIGURE 4-6:
0000h 15
CALL STACK FRAME
0
PC<15:0>
000000000 PC<22:16>
<Free Word>
W15 (before CALL)
W15 (after CALL)
POP : [--W15]
PUSH : [W15++]
 2016 Microchip Technology Inc.
DS30010118B-page 57