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PIC24FJ64GA705 Datasheet, PDF (299/412 Pages) –
PIC24FJ256GA705 FAMILY
REGISTER 24-5: AD1CON5: A/D CONTROL REGISTER 5
R/W-0
R/W-0
R/W-0
R/W-0
U-0
ASEN
LPEN
CTMREQ
BGREQ
—
bit 15
U-0
R/W-0
R/W-0
—
ASINT1
ASINT0
bit 8
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
—
WM1
WM0
CM1
CM0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11-10
bit 9-8
bit 7-4
bit 3-2
bit 1-0
ASEN: Auto-Scan Enable bit
1 = Auto-scan is enabled
0 = Auto-scan is disabled
LPEN: Low-Power Enable bit
1 = Low power is enabled after scan
0 = Full power is enabled after scan
CTMREQ: CTMU Request bit
1 = CTMU is enabled when the A/D is enabled and active
0 = CTMU is not enabled by the A/D
BGREQ: Band Gap Request bit
1 = Band gap is enabled when the A/D is enabled and active
0 = Band gap is not enabled by the A/D
Unimplemented: Read as ‘0’
ASINT<1:0>: Auto-Scan (Threshold Detect) Interrupt Mode bits
11 = Interrupt after Threshold Detect sequence has completed and valid compare has occurred
10 = Interrupt after valid compare has occurred
01 = Interrupt after Threshold Detect sequence has completed
00 = No interrupt
Unimplemented: Read as ‘0’
WM<1:0>: Write Mode bits
11 = Reserved
10 = Auto-compare only (conversion results are not saved, but interrupts are generated when a valid
match occurs, as defined by the CMx and ASINTx bits)
01 = Convert and save (conversion results are saved to locations as determined by the register bits
when a match occurs, as defined by the CMx bits)
00 = Legacy operation (conversion data is saved to a location determined by the Buffer register bits)
CM<1:0>: Compare Mode bits
11 = Outside Window mode: Valid match occurs if the conversion result is outside of the window
defined by the corresponding buffer pair
10 = Inside Window mode: Valid match occurs if the conversion result is inside the window defined by
the corresponding buffer pair
01 = Greater Than mode: Valid match occurs if the result is greater than the value in the corresponding
Buffer register
00 = Less Than mode: Valid match occurs if the result is less than the value in the corresponding Buffer
register
 2016 Microchip Technology Inc.
DS30010118B-page 299