PIC24FJ64GA705 Datasheet, PDF (214/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 17-9: SPIxIMSKL: SPIx INTERRUPT MASK REGISTER LOW
U-0
U-0
—
—
bit 15
U-0
R/W-0
R/W-0
U-0
—
FRMERREN BUSYEN
—
U-0
R/W-0
—
SPITUREN
bit 8
R/W-0
R/W-0
R/W-0
U-0
SRMTEN SPIROVEN SPIRBEN
—
bit 7
R/W-0
SPITBEN
U-0
R/W-0
R/W-0
—
SPITBFEN SPIRBFEN
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
FRMERREN: Enable Interrupt Events via FRMERR bit
1 = Frame error generates an interrupt event
0 = Frame error does not generate an interrupt event
BUSYEN: Enable Interrupt Events via SPIBUSY bit
1 = SPIBUSY generates an interrupt event
0 = SPIBUSY does not generate an interrupt event
Unimplemented: Read as ‘0’
SPITUREN: Enable Interrupt Events via SPITUR bit
1 = Transmit Underrun (TUR) generates an interrupt event
0 = Transmit Underrun does not generate an interrupt event
SRMTEN: Enable Interrupt Events via SRMT bit
1 = Shift Register Empty (SRMT) generates interrupt events
0 = Shift Register Empty does not generate interrupt events
SPIROVEN: Enable Interrupt Events via SPIROV bit
1 = SPIx Receive Overflow generates an interrupt event
0 = SPIx Receive Overflow does not generate an interrupt event
SPIRBEN: Enable Interrupt Events via SPIRBE bit
1 = SPIx Receive Buffer Empty generates an interrupt event
0 = SPIx Receive Buffer Empty does not generate an interrupt event
Unimplemented: Read as ‘0’
SPITBEN: Enable Interrupt Events via SPITBE bit
1 = SPIx Transmit Buffer Empty generates an interrupt event
0 = SPIx Transmit Buffer Empty does not generate an interrupt event
Unimplemented: Read as ‘0’
SPITBFEN: Enable Interrupt Events via SPITBF bit
1 = SPIx Transmit Buffer Full generates an interrupt event
0 = SPIx Transmit Buffer Full does not generate an interrupt event
SPIRBFEN: Enable Interrupt Events via SPIRBF bit
1 = SPIx Receive Buffer Full generates an interrupt event
0 = SPIx Receive Buffer Full does not generate an interrupt event
DS30010118B-page 214
 2016 Microchip Technology Inc.