PIC24FJ64GA705 Datasheet, PDF (111/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 9-7: REFOCONH: REFERENCE OSCILLATOR CONTROL REGISTER HIGH
U-0
—
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
RODIV<14:8>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
RODIV<7:0>
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-0
Unimplemented: Read as ‘0’
RODIV<14:0>: Reference Clock Divider bits
Specifies 1/2 period of the reference clock in the source clocks
(ex: Period of Output = [Reference Source * 2] * RODIV<14:0>; this equation does not apply to
RODIV<14:0> = 0).
111111111111111 = REFO clock is the base clock frequency divided by 65,534 (32,767 * 2)
111111111111110 = REFO clock is the base clock frequency divided by 65,532 (32,766 * 2)
•
•
•
000000000000011 = REFO clock is the base clock frequency divided by 6 (3 * 2)
000000000000010 = REFO clock is the base clock frequency divided by 4 (2 * 2)
000000000000001 = REFO clock is the base clock frequency divided by 2 (1 * 2)
000000000000000 = REFO clock is the same frequency as the base clock (no divider)
 2016 Microchip Technology Inc.
DS30010118B-page 111