PIC24FJ64GA705 Datasheet, PDF (238/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 19-5: UxBRG: UARTx BAUD RATE GENERATOR REGISTER
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
BRG<15:8>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
BRG<7:0>
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
BRG<15:0>: Baud Rate Divisor bits
REGISTER 19-6: UxADMD: UARTx ADDRESS DETECT AND MATCH REGISTER
R/W-0
ADMMASK7
bit 15
R/W-0
ADMMASK6
R/W-0
ADMMASK5
R/W-0
ADMMASK4
R/W-0
ADMMASK3
R/W-0
ADMMASK2
R/W-0
ADMMASK1
R/W-0
ADMMASK0
bit 8
R/W-0
ADMADDR7
bit 7
R/W-0
ADMADDR6
R/W-0
ADMADDR5
R/W-0
ADMADDR4
R/W-0
ADMADDR3
R/W-0
ADMADDR2
R/W-0
ADMADDR1
R/W-0
ADMADDR0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7-0
ADMMASK<7:0>: ADMADDR<7:0> (UxADMD<7:0>) Masking bits
For ADMMASKx:
1 = ADMADDRx is used to detect the address match
0 = ADMADDRx is not used to detect the address match
ADMADDR<7:0>: Address Detect Task Off-Load bits
Used with the ADMMASK<7:0> bits (UxADMD<15:8> to off-load the task of detecting the address
character from the processor during Address Detect mode.
DS30010118B-page 238
 2016 Microchip Technology Inc.