PIC24FJ64GA705 Datasheet, PDF (288/412 Pages) –

PIC24FJ256GA705 FAMILY
FIGURE 24-1:
12-BIT A/D CONVERTER BLOCK DIAGRAM
(PIC24FJ256GA705 FAMILY)
AVDD
AVSS
VREF+
VREF-
AN0
AN1
AN2
Internal Data Bus
VR+
16
VR-
VINH
VINL ^S/H
VR- VR+
DAC
Comparator
VINH
12-Bit SAR
Conversion Logic
Data Formatting
AN9⁽¹⁾
AN10⁽¹⁾
AN11⁽¹⁾
AN12⁽¹⁾
AN13⁽¹⁾
CTMU Current
Source⁽²⁾
VBG
AVDD
AVSS
Temperature
Diode
VINL
VINH
VINL
Extended DMA Data
ADC1BUF0:
ADC1BUF15
AD1CON1
AD1CON2
AD1CON3
AD1CON4
AD1CON5
AD1CHS
AD1CHITL
AD1CSSL
AD1CSSH
AD1DMBUF
Sample Control _{Control Logic}
Conversion Control
16
Input MUX Control
DMA Data Bus
Note 1: Available ANx pins are package-dependent.
2: CTMU current source is routed to the selected ANx pin when SAMP = 1 and TGEN = 0. See Section 27.0 “Charge
Time Measurement Unit (CTMU)” for details.
DS30010118B-page 288
 2016 Microchip Technology Inc.