PIC24FJ64GA705 Datasheet, PDF (206/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 17-2: SPIxCON1H: SPIx CONTROL REGISTER 1 HIGH
R/W-0
AUDEN⁽¹⁾
bit 15
R/W-0
SPISGNEXT
R/W-0
IGNROV
R/W-0
IGNTUR
R/W-0
AUDMONO⁽²⁾
R/W-0
URDTEN⁽³⁾
R/W-0
R/W-0
AUDMOD1⁽⁴⁾ AUDMOD0⁽⁴⁾
bit 8
R/W-0
FRMEN
bit 7
R/W-0
FRMSYNC
R/W-0
FRMPOL
R/W-0
MSSEN
R/W-0
FRMSYPW
R/W-0
FRMCNT2
R/W-0
FRMCNT1
R/W-0
FRMCNT0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
AUDEN: Audio Codec Support Enable bit⁽¹⁾
1 = Audio protocol is enabled; MSTEN controls the direction of both the SCKx and frame (a.k.a. LRC),
and this module functions as if FRMEN = 1, FRMSYNC = MSTEN, FRMCNT<2:0> = 001 and
SMP = 0, regardless of their actual values
0 = Audio protocol is disabled
SPISGNEXT: SPIx Sign-Extend RX FIFO Read Data Enable bit
1 = Data from RX FIFO is sign-extended
0 = Data from RX FIFO is not sign-extended
IGNROV: Ignore Receive Overflow bit
1 = A Receive Overflow (ROV) is NOT a critical error; during ROV, data in the FIFO is not overwritten
by the receive data
0 = A ROV is a critical error that stops SPI operation
IGNTUR: Ignore Transmit Underrun bit
1 = A Transmit Underrun (TUR) is NOT a critical error and data indicated by URDTEN is transmitted
until the SPIxTXB is not empty
0 = A TUR is a critical error that stops SPI operation
AUDMONO: Audio Data Format Transmit bit⁽²⁾
1 = Audio data is mono (i.e., each data word is transmitted on both left and right channels)
0 = Audio data is stereo
URDTEN: Transmit Underrun Data Enable bit⁽³⁾
1 = Transmits data out of SPIxURDTL/H register during Transmit Underrun conditions
0 = Transmits the last received data during Transmit Underrun conditions
AUDMOD<1:0>: Audio Protocol Mode Selection bits⁽⁴⁾
11 = PCM/DSP mode
10 = Right Justified mode: This module functions as if SPIFE = 1, regardless of its actual value
01 = Left Justified mode: This module functions as if SPIFE = 1, regardless of its actual value
00 = I²S mode: This module functions as if SPIFE = 0, regardless of its actual value
FRMEN: Framed SPIx Support bit
1 = Framed SPIx support is enabled (SSx pin is used as the FSYNC input/output)
0 = Framed SPIx support is disabled
Note 1:
2:
3:
4:
AUDEN can only be written when the SPIEN bit = 0.
AUDMONO can only be written when the SPIEN bit = 0 and is only valid for AUDEN = 1.
URDTEN is only valid when IGNTUR = 1.
AUDMOD<1:0> bits can only be written when the SPIEN bit = 0 and are only valid when AUDEN = 1.
When NOT in PCM/DSP mode, this module functions as if FRMSYPW = 1, regardless of its actual value.
DS30010118B-page 206
 2016 Microchip Technology Inc.