PIC24FJ64GA705 Datasheet, PDF (184/412 Pages) –

PIC24FJ256GA705 FAMILY
16.1 Time Base Generator
The Timer Clock Generator (TCG) generates a clock
for the module’s internal time base using one of the
clock signals already available on the microcontroller.
This is used as the time reference for the module in its
three major modes. The internal time base is shown in
Figure 16-2.
There are eight inputs available to the clock generator,
which are selected using the CLKSEL<2:0> bits
(CCPxCON1L<10:8>). Available sources include the
FRC and LPRC, the Secondary Oscillator and the TCLKI
external clock inputs. The system clock is the default
source (CLKSEL<2:0> = 000). On PIC24FJ256GA705
family devices, clock sources to the MCCPx module
must be synchronized with the system clock. As a result,
when clock sources are selected, clock input timing
restrictions or module operating restrictions may exist.
FIGURE 16-2:
TIMER CLOCK GENERATOR
TMRPS<1:0>
TMRSYNC
SSDG
Clock
Sources
Prescaler
Clock
Synchronizer
Gate⁽¹⁾
To Rest
of Module
CLKSEL<2:0>
Note 1: Gating available in Timer modes only.
DS30010118B-page 184
 2016 Microchip Technology Inc.