PIC24FJ64GA705 Datasheet, PDF (160/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 12-1: T1CON: TIMER1 CONTROL REGISTER⁽¹⁾
R/W-0
U-0
R/W-0
U-0
U-0
U-0
TON
—
TSIDL
—
—
—
bit 15
R/W-0
TECS1
R/W-0
TECS0
bit 8
U-0
—
bit 7
R/W-0
R/W-0
R/W-0
U-0
TGATE
TCKPS1
TCKPS0
—
R/W-0
TSYNC
R/W-0
TCS
U-0
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-10
bit 9-8
bit 7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
TON: Timer1 On bit
1 = Starts 16-bit Timer1
0 = Stops 16-bit Timer1
Unimplemented: Read as ‘0’
TSIDL: Timer1 Stop in Idle Mode bit
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode
Unimplemented: Read as ‘0’
TECS<1:0>: Timer1 Extended Clock Source Select bits (selected when TCS = 1)
11 = Generic timer (TxCK) external input
10 = LPRC Oscillator
01 = T1CK external clock input
00 = SOSC
Unimplemented: Read as ‘0’
TGATE: Timer1 Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation is enabled
0 = Gated time accumulation is disabled
TCKPS<1:0>: Timer1 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
Unimplemented: Read as ‘0’
TSYNC: Timer1 External Clock Input Synchronization Select bit
When TCS = 1:
1 = Synchronizes the external clock input
0 = Does not synchronize the external clock input
When TCS = 0:
This bit is ignored.
TCS: Timer1 Clock Source Select bit
1 = Extended clock is selected by the timer
0 = Internal clock (FOSC/2)
Unimplemented: Read as ‘0’
Note 1: Changing the value of T1CON while the timer is running (TON = 1) causes the timer prescale counter to
reset and is not recommended.
DS30010118B-page 160
 2016 Microchip Technology Inc.