PIC24FJ64GA705 Datasheet, PDF (110/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 9-6: REFOCONL: REFERENCE OSCILLATOR CONTROL REGISTER LOW
R/W-0
ROEN
bit 15
U-0
R/W-0
R/W-0
R/W-0
—
ROSIDL
ROOUT
ROSLP
U-0
R/W-0
R-0
—
ROSWEN ROACTIVE
bit 8
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
—
ROSEL3
ROSEL2
ROSEL1
ROSEL0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7-4
bit 3-0
ROEN: Reference Oscillator Output Enable bit
1 = Reference Oscillator module is enabled
0 = Reference Oscillator is disabled
Unimplemented: Read as ‘0’
ROSIDL: REFO Stop in Idle Mode bit
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode
ROOUT: Reference Clock Output Enable bit
1 = Reference clock is driven out on the REFO pin
0 = Reference clock is not driven out on the REFO pin
ROSLP: Reference Oscillator Output Stop in Sleep bit
1 = Reference Oscillator continues to run in Sleep
0 = Reference Oscillator is disabled in Sleep
Unimplemented: Read as ‘0’
ROSWEN: Reference Clock RODIVx/ROTRIMx Switch Enable bit
1 = Switch clock divider; clock divider switching is currently in progress
0 = Clock divider switch has been completed
ROACTIVE: Reference Clock Request Status bit
1 = Reference clock is active (user should not change the REFO settings)
0 = Reference clock is inactive (user can update the REFO settings)
Unimplemented: Read as ‘0’
ROSEL<3:0>: Reference Clock Source Select bits
1111-1001 = Reserved
1000 = REFI pin
0111 = Reserved
0110 = PLL
0101 = SOSC
0100 = LPRC
0011 = FRC
0010 = POSC
0001 = System clock (FOSC/2)
0000 = FOSC
DS30010118B-page 110
 2016 Microchip Technology Inc.