PIC24FJ64GA705 Datasheet, PDF (296/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 24-2: AD1CON2: A/D CONTROL REGISTER 2 (CONTINUED)
bit 6-2
bit 1
bit 0
SMPI<4:0>: Interrupt Sample/DMA Increment Rate Select bits
When DMAEN = 1 and DMABM = 0:
11111 = Increments the DMA address after completion of the 32nd sample/conversion operation
11110 = Increments the DMA address after completion of the 31st sample/conversion operation
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00001 = Increments the DMA address after completion of the 2nd sample/conversion operation
00000 = Increments the DMA address after completion of each sample/conversion operation
When DMAEN = 1 and DMABM = 1:
11111 = Resets the DMA offset after completion of the 32nd sample/conversion operation
11110 = Resets the DMA offset after completion of the 31nd sample/conversion operation
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00001 = Resets the DMA offset after completion of the 2nd sample/conversion operation
00000 = Resets the DMA offset after completion of every sample/conversion operation
When DMAEN = 0:
11111 = Interrupts at the completion of the conversion for each 32nd sample
11110 = Interrupts at the completion of the conversion for each 31st sample
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00001 = Interrupts at the completion of the conversion for every other sample
00000 = Interrupts at the completion of the conversion for each sample
BUFM: Buffer Fill Mode Select bit
1 = Starts buffer filling at ADC1BUF0 on first interrupt and ADC1BUF13 on next interrupt
0 = Always starts filling buffer at ADC1BUF0
ALTS: Alternate Input Sample Mode Select bit
1 = Uses channel input selects for Sample A on first sample and Sample B on next sample
0 = Always uses channel input selects for Sample A
DS30010118B-page 296
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