PIC24FJ64GA705 Datasheet, PDF (246/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 20-5: PMCSxCF: EPMP CHIP SELECT x CONFIGURATION REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
CSDIS
CSP
CSPTEN
BEP
—
WRSP
RDSP
bit 15
R/W-0
SM
bit 8
R/W-0
R/W-0
R/W-0
U-0
U-0
U-0
U-0
U-0
ACKP
PTSZ1
PTSZ0
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6-5
bit 4-0
CSDIS: Chip Select x Disable bit
1 = Disables the Chip Select x functionality
0 = Enables the Chip Select x functionality
CSP: Chip Select x Polarity bit
1 = Active-high (PMCSx)
0 = Active-low (PMCSx)
CSPTEN: PMCSx Port Enable bit
1 = PMCSx port is enabled
0 = PMCSx port is disabled
BEP: Chip Select x Nibble/Byte Enable Polarity bit
1 = Nibble/byte enable is active-high (PMBE0, PMBE1)
0 = Nibble/byte enable is active-low (PMBE0, PMBE1)
Unimplemented: Read as ‘0’
WRSP: Chip Select x Write Strobe Polarity bit
For Slave modes and Master mode when SM = 0:
1 = Write strobe is active-high (PMWR)
0 = Write strobe is active-low (PMWR)
For Master mode when SM = 1:
1 = Enable strobe is active-high (PMENB)
0 = Enable strobe is active-low (PMENB)
RDSP: Chip Select x Read Strobe Polarity bit
For Slave modes and Master mode when SM = 0:
1 = Read strobe is active-high (PMRD)
0 = Read strobe is active-low (PMRD)
For Master mode when SM = 1:
1 = Read/write strobe is active-high (PMRD/PMWR)
0 = Read/write strobe is active-low (PMRD/PMWR)
SM: Chip Select x Strobe Mode bit
1 = Reads/writes and enables strobes (PMRD/PMWR and PMENB)
0 = Reads and writes strobes (PMRD and PMWR)
ACKP: Chip Select x Acknowledge Polarity bit
1 = ACK is active-high (PMACK1)
0 = ACK is active-low (PMACK1)
PTSZ<1:0>: Chip Select x Port Size bits
11 = Reserved
10 = Reserved
01 = 4-bit port size (PMD<3:0>)
00 = 8-bit port size (PMD<7:0>)
Unimplemented: Read as ‘0’
DS30010118B-page 246
 2016 Microchip Technology Inc.