PIC24FJ64GA705 Datasheet, PDF (245/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 20-4: PMCON4: EPMP CONTROL REGISTER 4
U-0
—
bit 15
R/W-0
PTEN14
R/W-0
R/W-0
R/W-0
R/W-0
PTEN<13:8>
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
PTEN<7:3>
R/W-0
R/W-0
R/W-0
R/W-0
PTEN<2:0>
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13-3
bit 2-0
Unimplemented: Read as ‘0’
PTEN14: PMA14 Port Enable bit
1 = PMA14 functions as either Address Line 14 or Chip Select 1
0 = PMA14 functions as port I/O
PTEN<13:3>: EPMP Address Port Enable bits
1 = PMA<13:3> function as EPMP address lines
0 = PMA<13:3> function as port I/Os
PTEN<2:0>: PMALU/PMALH/PMALL Strobe Enable bits
1 = PMA<2:0> function as either address lines or address latch strobes
0 = PMA<2:0> function as port I/Os
 2016 Microchip Technology Inc.
DS30010118B-page 245