PIC24FJ64GA705 Datasheet, PDF (231/412 Pages) –

PIC24FJ256GA705 FAMILY
19.1 UARTx Baud Rate Generator (BRG)
The UARTx module includes a dedicated, 16-bit Baud
Rate Generator. The UxBRG register controls the
period of a free-running, 16-bit timer. Equation 19-1
shows the formula for computation of the baud rate
when BRGH = 0.
EQUATION 19-1: UARTx BAUD RATE WITH
BRGH = 0^(1,2)
FCY
Baud Rate =
16 • (UxBRG + 1)
UxBRG =
FCY
–1
16 • Baud Rate
Note 1:
2:
FCY denotes the instruction cycle
clock frequency (FOSC/2).
Based on FCY = FOSC/2; Doze mode
and PLL are disabled.
Example 19-1 shows the calculation of the baud rate
error for the following conditions:
• FCY = 4 MHz
• Desired Baud Rate = 9600
The maximum baud rate (BRGH = 0) possible is
FCY/16 (for UxBRG = 0) and the minimum baud rate
possible is FCY/(16 * 65536).
Equation 19-2 shows the formula for computation of
the baud rate when BRGH = 1.
EQUATION 19-2: UARTx BAUD RATE WITH
BRGH = 1^(1,2)
Baud Rate =
FCY
4 • (UxBRG + 1)
UxBRG =
FCY
–1
4 • Baud Rate
Note 1:
2:
FCY denotes the instruction cycle
clock frequency.
Based on FCY = FOSC/2; Doze mode
and PLL are disabled.
The maximum baud rate (BRGH = 1) possible is FCY/4
(for UxBRG = 0) and the minimum baud rate possible
is FCY/(4 * 65536).
Writing a new value to the UxBRG register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
EXAMPLE 19-1: BAUD RATE ERROR CALCULATION (BRGH = 0)⁽¹⁾
Desired Baud Rate = FCY/(16 (UxBRG + 1))
Solving for UxBRG Value:
UxBRG
UxBRG
UxBRG
= ((FCY/Desired Baud Rate)/16) – 1
= ((4000000/9600)/16) – 1
= 25
Calculated Baud Rate = 4000000/(16 (25 + 1))
= 9615
Error
= (Calculated Baud Rate – Desired Baud Rate)
Desired Baud Rate
= (9615 – 9600)/9600
= 0.16%
Note 1: Based on FCY = FOSC/2; Doze mode and PLL are disabled.
 2016 Microchip Technology Inc.
DS30010118B-page 231