|
PIC24FJ64GA705 Datasheet, PDF (120/412 Pages) – | |||
|
◁ |
PIC24FJ256GA705 FAMILY
REGISTER 10-4: PMD4: PERIPHERAL MODULE DISABLE REGISTER 4
U-0
U-0
U-0
U-0
U-0
U-0
U-0
â
â
â
â
â
â
â
bit 15
U-0
â
bit 8
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
U-0
â
â
â
â
REFOMD CTMUMD
LVDMD
â
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as â0â
REFOMD: Reference Output Clock Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
CTMUMD: CTMU Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
LVDMD: High/Low-Voltage Detect Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
Unimplemented: Read as â0â
DS30010118B-page 120
ï£ 2016 Microchip Technology Inc.
|
▷ |