PIC24FJ64GA705 Datasheet, PDF (117/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 10-1: PMD1: PERIPHERAL MODULE DISABLE REGISTER 1
U-0
U-0
R/W-0
R/W-0
R/W-0
U-0
U-0
—
—
T3MD
T2MD
T1MD
—
—
bit 15
U-0
—
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
I2C1MD
U2MD
U1MD
SPI2MD
SPI1MD
—
bit 7
U-0
R/W-0
—
ADC1MD
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13
bit 12
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-1
bit 0
Unimplemented: Read as ‘0’
T3MD: Timer3 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
T2MD: Timer2 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
T1MD: Timer1 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
Unimplemented: Read as ‘0’
I2C1MD: I2C1 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
U2MD: UART2 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
U1MD: UART1 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
SPI2MD: SPI2 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
SPI1MD: SPI1 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
Unimplemented: Read as ‘0’
ADC1MD: A/D Converter Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
 2016 Microchip Technology Inc.
DS30010118B-page 117