PIC24FJ64GA705 Datasheet, PDF (145/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 11-21: RPINR11: PERIPHERAL PIN SELECT INPUT REGISTER 11
U-0
—
bit 15
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
—
OCFBR5 OCFBR4 OCFBR3 OCFBR2 OCFBR1
R/W-1
OCFBR0
bit 8
U-0
—
bit 7
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
—
OCFAR5
OCFAR4
OCFAR3
OCFAR2
OCFAR1
OCFAR0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-8
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
OCFBR<5:0>: Assign Output Compare Fault B (OCFB) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
OCFAR<5:0>: Assign Output Compare Fault A (OCFA) to Corresponding RPn or RPIn Pin bits
REGISTER 11-22: RPINR12: PERIPHERAL PIN SELECT INPUT REGISTER 12
U-0
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
—
—
TCKIBR5 TCKIBR4 TCKIBR3 TCKIBR2 TCKIBR1
bit 15
R/W-1
TCKIBR0
bit 8
U-0
—
bit 7
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
—
TCKIAR5 TCKIAR4 TCKIAR3 TCKIAR2 TCKIAR1 TCKIAR0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-8
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
TCKIBR<5:0>: Assign MCCP/SCCP Clock Input B to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
TCKIAR<5:0>: Assign MCCP/SCCP Clock Input A to Corresponding RPn or RPIn Pin bits
 2016 Microchip Technology Inc.
DS30010118B-page 145