PIC24FJ64GA705 Datasheet, PDF (199/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 16-8: CCPxSTATH: CCPx STATUS REGISTER HIGH
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
bit 15
U-0
U-0
U-0
R-0
R-0
R-0
—
—
—
PRLWIP TMRHWIP TMRLWIP
bit 7
U-0
—
R-0
RBWIP
U-0
—
bit 8
R-0
RAWIP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
PRLWIP: CCPxPRL Write in Progress Status bit
1 = An update to the CCPxPRL register with the buffered contents is in progress
0 = An update to the CCPxPRL register is not in progress
TMRHWIP: CCPxTMRH Write in Progress Status Bit
1 = An update to the CCPxTMRH register with the buffered contents is in progress
0 = An update to the CCPxTMRH register is not in progress.
TMRLWIP: CCPxTMRL Write in Progress Status bit
1 = An update to the CCPxTMRL register with the buffered contents is in progress
0 = An update to the CCPxTMRL register is not in progress
RBWIP: CCPxRB Write in Progress Status bit
1 = An update to the CCPxRB register with the buffered contents is in progress
0 = An update to the CCPxRB register is not in progress
RAWIP: CCPxRA Write in Progress Status bit
1 = An update to the CCPxRA register with the buffered contents is in progress
0 = An update to the CCPxRA register is not in progress
 2016 Microchip Technology Inc.
DS30010118B-page 199