PIC24FJ64GA705 Datasheet, PDF (122/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 10-6: PMD6: PERIPHERAL MODULE DISABLE REGISTER 6
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
—
—
SPI3MD
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-1
bit 0
Unimplemented: Read as ‘0’
SPI3MD: SPI3 Module Disable bit
1 = Module is disabled
0 = Module power and clock sources are enabled
REGISTER 10-7: PMD7: PERIPHERAL MODULE DISABLE REGISTER 7
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
U-0
R/W-0
R/W-0
U-0
U-0
U-0
U-0
—
—
DMA1MD DMA0MD
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-6
bit 5
bit 4
bit 3-0
Unimplemented: Read as ‘0’
DMA1MD: DMA1 Controller (Channels 4 through 7) Disable bit
1 = Controller is disabled
0 = Controller power and clock sources are enabled
DMA0MD: DMA0 Controller (Channels 0 through 3) Disable bit
1 = Controller is disabled
0 = Controller power and clock sources are enabled
Unimplemented: Read as ‘0’
DS30010118B-page 122
 2016 Microchip Technology Inc.