PIC24FJ64GA705 Datasheet, PDF (271/412 Pages) –

PIC24FJ256GA705 FAMILY
22.0 32-BIT PROGRAMMABLE
CYCLIC REDUNDANCY CHECK
(CRC) GENERATOR
Note:
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to
the “dsPIC33/PIC24 Family Reference
Manual”, “32-Bit Programmable
Cyclic Redundancy Check (CRC)”
(DS30009729), which is available from the
Microchip web site (www.microchip.com).
The information in this data sheet
supersedes the information in the FRM.
FIGURE 22-1:
CRC BLOCK DIAGRAM
CRCDATH
CRCDATL
The 32-bit programmable CRC generator provides a
hardware implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-Programmable CRC Polynomial Equation,
up to 32 Bits
• Programmable Shift Direction (little or big-endian)
• Independent Data and Polynomial Lengths
• Configurable Interrupt Output
• Data FIFO
Figure 22-1 displays a simplified block diagram of the
CRC generator. A simple version of the CRC shift
engine is displayed in Figure 22-2.
Variable FIFO
(4x32, 8x16 or 16x8)
Shift Buffer
FIFO Empty
Event
LENDIAN
1
0
CRCWDATH
CRCWDATL
CRC Shift Engine
Shifter Clock
2 * FCY
CRCISEL
1 _CRC
Interrupt
0
Shift
Complete
Event
FIGURE 22-2:
CRC SHIFT ENGINE DETAIL
CRC Shift Engine
CRCWDATH
Shift Buffer
Data
X0
Bit 0
Read/Write Bus
X1
Bit 1
CRCWDATL
Xn⁽¹⁾
Bit n⁽¹⁾
Note 1: n = PLEN<4:1> + 1.
 2016 Microchip Technology Inc.
DS30010118B-page 271