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| PIC24FJ64GA705 Datasheet, PDF (297/412 Pages) – | |||
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PIC24FJ256GA705 FAMILY
REGISTER 24-3: AD1CON3: A/D CONTROL REGISTER 3
R/W-0
ADRC(1)
bit 15
R-0
EXTSAM
R/W-0
PUMPEN(2)
R/W-0
SAMC4
R/W-0
SAMC3
R/W-0
SAMC2
R/W-0
SAMC1
R/W-0
SAMC0
bit 8
R/W-0
ADCS7
bit 7
R/W-0
ADCS6
R/W-0
ADCS5
R/W-0
ADCS4
R/W-0
ADCS3
R/W-0
ADCS2
R/W-0
ADCS1
R/W-0
ADCS0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-8
bit 7-0
ADRC: A/D Conversion Clock Source bit(1)
1 = Dedicated ADC RC clock generator (4 MHz nominal).
0 = Clock derived from system clock
EXTSAM: Extended Sampling Time bit
1 = A/D is still sampling after SAMP = 0
0 = A/D is finished sampling
PUMPEN: Charge Pump Enable bit(2)
1 = Charge pump for switches is enabled
0 = Charge pump for switches is disabled
SAMC<4:0>: Auto-Sample Time Select bits
11111 = 31 TAD
ï·ï ï·ï ï·
00001 = 1 TAD
00000 = 0 TAD
ADCS<7:0>: A/D Conversion Clock Select bits
11111111 = 256 ⢠TCY = TAD
ï·ï ï·ï ï·
00000001 = 2 ⢠TCY = TAD
00000000 = TCY = TAD
Note 1:
2:
Selecting the internal ADC RC clock requires that ADCSx be 1 or greater. Setting ADCSx = 0 when
ADRC = 1 will violate the TAD (min) specification.
The user should enable the charge pump if AVDD is < 2.7 V. Longer sample times are required due to the
increase of the internal resistance of the MUX if the charge pump is disabled.
ï£ 2016 Microchip Technology Inc.
DS30010118B-page 297
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