PIC24FJ64GA705 Datasheet, PDF (351/412 Pages) –

PIC24FJ256GA705 FAMILY
TABLE 31-2: INSTRUCTION SET OVERVIEW
Assembly
Mnemonic
ADD
ADDC
AND
ASR
BCLR
BRA
BSET
BSW
BTG
BTSC
ADD
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDC
ADDC
AND
AND
AND
AND
AND
ASR
ASR
ASR
ASR
ASR
BCLR
BCLR
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BSET
BSET
BSW.C
BSW.Z
BTG
BTG
BTSC
Assembly Syntax
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
f,#bit4
Ws,#bit4
C,Expr
GE,Expr
GEU,Expr
GT,Expr
GTU,Expr
LE,Expr
LEU,Expr
LT,Expr
LTU,Expr
N,Expr
NC,Expr
NN,Expr
NOV,Expr
NZ,Expr
OV,Expr
Expr
Z,Expr
Wn
f,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
f,#bit4
Description
f = f + WREG
WREG = f + WREG
Wd = lit10 + Wd
Wd = Wb + Ws
Wd = Wb + lit5
f = f + WREG + (C)
WREG = f + WREG + (C)
Wd = lit10 + Wd + (C)
Wd = Wb + Ws + (C)
Wd = Wb + lit5 + (C)
f = f .AND. WREG
WREG = f .AND. WREG
Wd = lit10 .AND. Wd
Wd = Wb .AND. Ws
Wd = Wb .AND. lit5
f = Arithmetic Right Shift f
WREG = Arithmetic Right Shift f
Wd = Arithmetic Right Shift Ws
Wnd = Arithmetic Right Shift Wb by Wns
Wnd = Arithmetic Right Shift Wb by lit5
Bit Clear f
Bit Clear Ws
Branch if Carry
Branch if Greater than or Equal
Branch if Unsigned Greater than or Equal
Branch if Greater than
Branch if Unsigned Greater than
Branch if Less than or Equal
Branch if Unsigned Less than or Equal
Branch if Less than
Branch if Unsigned Less than
Branch if Negative
Branch if Not Carry
Branch if Not Negative
Branch if Not Overflow
Branch if Not Zero
Branch if Overflow
Branch Unconditionally
Branch if Zero
Computed Branch
Bit Set f
Bit Set Ws
Write C bit to Ws<Wb>
Write Z bit to Ws<Wb>
Bit Toggle f
Bit Toggle Ws
Bit Test f, Skip if Clear
BTSC
Ws,#bit4
Bit Test Ws, Skip if Clear
# of
# of
Status Flags
Words Cycles
Affected
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 N, Z
1
1 N, Z
1
1 N, Z
1
1 N, Z
1
1 N, Z
1
1 C, N, OV, Z
1
1 C, N, OV, Z
1
1 C, N, OV, Z
1
1 N, Z
1
1 N, Z
1
1 None
1
1 None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
1 (2) None
1
2 None
1
1 (2) None
1
2 None
1
1 None
1
1 None
1
1 None
1
1 None
1
1 None
1
1 None
1
1 None
(2 or 3)
1
1 None
(2 or 3)
 2016 Microchip Technology Inc.
DS30010118B-page 351