PIC24FJ64GA705 Datasheet, PDF (105/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 9-5: OSCFDIV: OSCILLATOR FRACTIONAL DIVISOR REGISTER⁽¹⁾
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
TRIM<0:7>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
TRIM8
—
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-7
bit 6-0
TRIM<0:8> Trim bits
Provides fractional additive to the DIV<14:0> bits value for the 1/2 period of the oscillator clock.
0000_0000_0 = 0/512 (0.0) divisor added to DIVx value
0000_0000_1 = 1/512 (0.001953125) divisor added to DIVx value
0000_0001_0 = 2/512 (0.00390625) divisor added to DIVx value
•
•
•
100000000 = 256/512 (0.5000) divisor added to DIVx value
•
•
•
1111_1111_0 = 510/512 (0.99609375) divisor added to DIVx value
1111_1111_1 = 511/512 (0.998046875) divisor added to DIVx value
Unimplemented: Read as ‘0’
Note 1: TRIMx values greater than zero are ONLY valid when DIVx values are greater than zero.
 2016 Microchip Technology Inc.
DS30010118B-page 105