PIC24FJ64GA705 Datasheet, PDF (399/412 Pages) –

PIC24FJ256GA705 FAMILY
APPENDIX A: REVISION HISTORY
Revision A (March 2016)
Original data sheet for the PIC24FJ256GA705 family of
devices.
Revision B (October 2016)
This revision incorporates the following updates:
• Sections:
- Removes Section 9.5 “FRC Active Clock
Tuning”.
- Updates the Absolute Maximum Ratings in
Section 32.0 “Electrical Characteristics”.
- Changes the 48-Lead QFN (7x7 mm) to
48-Lead UQFN (6x6 mm) in Section 33.0
“Packaging Information”.
• Registers:
- Updates Register 9-1, Register 9-3,
Register 9-6, Register 16-5 and Register 16-6.
• Tables:
- Adds Table 11-3, Table 11-4 and Table 11-5.
- Updates the GPIO column in the Peripheral
Features table on Page 2.
- Updates Table 1, Table 2, Table 3, Table 4,
Table 5, Table 32-4, Table 32-5, Table 32-6,
Table 32-7 and Table 32-25.
• Figures
- Updates Figure 9-1.
• Changes to text and formatting were incorporated
throughout the document.
 2016 Microchip Technology Inc.
DS30010118B-page 399