PIC24FJ64GA705 Datasheet, PDF (229/412 Pages) –

PIC24FJ256GA705 FAMILY
19.0 UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
Note:
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to
the “dsPIC33/PIC24 Family Reference
Manual”, “UART” (DS39708), which is
available from the Microchip web site
(www.microchip.com). The information
in this data sheet supersedes the
information in the FRM.
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules available
in the PIC24F device family. The UART is a full-duplex,
asynchronous system that can communicate with
peripheral devices, such as personal computers,
LIN/J2602, RS-232 and RS-485 interfaces. The
module also supports a hardware flow control option
with the UxCTS and UxRTS pins. The UART module
includes an IrDA^® encoder/decoder unit.
The PIC24FJ256GA705 family devices are equipped
with two UART modules, referred to as UART1 and
UART2.
The primary features of the UARTx modules are:
• Full-Duplex, 8 or 9-Bit Data Transmission through
the UxTX and UxRX Pins
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
• Hardware Flow Control Option with the UxCTS
and UxRTS Pins
• Fully Integrated Baud Rate Generator with
16-Bit Prescaler
• Baud Rates Range from up to 1 Mbps and Down to
15 Hz at 16 MIPS in 16x mode
• Baud Rates Range from up to 4 Mbps and Down to
61 Hz at 16 MIPS in 4x mode
• 4-Deep, First-In-First-Out (FIFO) Transmit Data
Buffer
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-Bit mode with Address Detect
(9^th bit = 1)
• Separate Transmit and Receive Interrupts
• Loopback mode for Diagnostic Support
• Polarity Control for Transmit and Receive Lines
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA^® Encoder and Decoder Logic
• Includes DMA Support
• 16x Baud Clock Output for IrDA Support
A simplified block diagram of the UARTx module is
shown in Figure 19-1. The UARTx module consists of
these key important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
Note:
Throughout this section, references to
register and bit names that may be asso-
ciated with a specific UART module are
referred to generically by the use of ‘x’ in
place of the specific module number.
Thus, “UxSTA” might refer to the Status
register for either UART1 or UART2.
 2016 Microchip Technology Inc.
DS30010118B-page 229