PIC24FJ64GA705 Datasheet, PDF (324/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 27-2: CTMUCON1H: CTMU CONTROL REGISTER 1 HIGH (CONTINUED)
bit 5-2
bit 1
bit 0
EDG2SEL<3:0>: Edge 2 Source Select bits
1111 = CMP C3OUT
1110 = CMP C2OUT
1101 = CMP C1OUT
1100 = Peripheral clock
1011 = IC3 interrupt
1010 = IC2 interrupt
1001 = IC1 interrupt
1000 = CTED13 pin
0111 = CTED12 pin
0110 = CTED11 pin
0101 = CTED10 pin
0100 = CTED9 pin
0011 = CTED1 pin
0010 = CTED2 pin
0001 = OC1
0000 = Timer1 match
Unimplemented: Read as ‘0’
IRNGH: High-Current Range Select bit
1 = Uses the higher current ranges (550 µA-2.2 mA)
0 = Uses the lower current ranges (550 nA-50 µA)
Current output is set by the IRNG<1:0> bits in the CTMUCON1L register.
DS30010118B-page 324
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