PIC24FJ64GA705 Datasheet, PDF (279/412 Pages) –

PIC24FJ256GA705 FAMILY
FIGURE 23-3:
CLCx INPUT SOURCE SELECTION DIAGRAM
CLCIN[0]
CLCIN[1]
CLCIN[2]
CLCIN[3]
CLCIN[4]
CLCIN[5]
CLCIN[6]
CLCIN[7]
Data Selection
000
Data 1 Non-Inverted
Data 1
Inverted
111
DS1x (CLCxSEL<2:0>)
CLCIN[8]
CLCIN[9]
CLCIN[10]
CLCIN[11]
CLCIN[12]
CLCIN[13]
CLCIN[14]
CLCIN[15]
000
Data 2 Non-Inverted
Data 2
Inverted
111
DS2x (CLCxSEL<6:4>)
CLCIN[16]
CLCIN[17]
CLCIN[18]
CLCIN[19]
CLCIN[20]
CLCIN[21]
CLCIN[22]
CLCIN[23]
000
Data 3 Non-Inverted
Data 3
Inverted
111
DS3x (CLCxSEL<10:8>)
CLCIN[24]
CLCIN[25]
CLCIN[26]
CLCIN[27]
CLCIN[28]
CLCIN[29]
CLCIN[30]
CLCIN[31]
000
Data 4 Non-Inverted
Data 4
Inverted
111
DS4x (CLCxSEL<14:12>)
G1D1T
G1D1N
G1D2T
G1D2N
G1D3T
G1D3N
G1D4T
G1D4N
Data Gate 1
Gate 1
G1POL
(CLCxCONH<0>)
Data Gate 2
(Same as Data Gate 1)
Gate 2
Data Gate 3
(Same as Data Gate 1)
Gate 3
Data Gate 4
(Same as Data Gate 1)
Gate 4
Note: All controls are undefined at power-up.
 2016 Microchip Technology Inc.
DS30010118B-page 279