PIC24FJ64GA705 Datasheet, PDF (337/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 29-7: FPOR CONFIGURATION REGISTER
U-1
U-1
U-1
U-1
U-1
U-1
U-1
U-1
—
—
—
—
—
—
—
—
bit 23
bit 16
U-1
U-1
U-1
U-1
U-1
U-1
U-1
U-1
—
—
—
—
—
—
—
—
bit 15
bit 8
U-1
U-1
U-1
U-1
R/PO-1
R/PO-1
R/PO-1
R/PO-1
—
—
—
—
DNVPEN
LPCFG
BOREN1 BOREN0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
PO = Program Once bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 23-4
bit 3
bit 2
bit 1-0
Unimplemented: Read as ‘1’
DNVPEN: Downside Voltage Protection Enable bit
1 = Downside protection is enabled when BOR is inactive
0 = Downside protection is disabled when BOR is inactive
LPCFG: Low-Power Regulator Control bit
1 = Retention feature is not available
0 = Retention feature is available and controlled by RETEN during Sleep
BOREN<1:0>: Brown-out Reset Enable bits
11 = Brown-out Reset is enabled in hardware; SBOREN bit is disabled
10 = Brown-out Reset is enabled only while device is active and is disabled in Sleep; SBOREN bit is
disabled
01 = Brown-out Reset is controlled with the SBOREN bit setting
00 = Brown-out Reset is disabled in hardware; SBOREN bit is disabled
 2016 Microchip Technology Inc.
DS30010118B-page 337