PIC24FJ64GA705 Datasheet, PDF (128/412 Pages) –

PIC24FJ256GA705 FAMILY
11.3 Interrupt-on-Change (IOC)
The Interrupt-on-Change function of the I/O ports
allows the PIC24FJ256GA705 family of devices to gen-
erate interrupt requests to the processor in response to
a Change-of-State (COS) on selected input pins. This
feature is capable of detecting input Change-of-States,
even in Sleep mode, when the clocks are disabled.
Interrupt-on-Change functionality is enabled on a pin
by setting the IOCPx and/or IOCNx register bit for that
pin. For example, PORTC has register names, IOCPC
and IOCNC, for these functions. Setting a value of ‘1’ in
the IOCPx register enables interrupts for low-to-high
transitions, while setting a value of ‘1’ in the IOCNx
register enables interrupts for high-to-low transitions.
Setting a value of ‘1’ in both register bits will enable
interrupts for either case (e.g., a pulse on the pin will
generate two interrupts). In order for any IOC to be
detected, the global IOC Interrupt Enable bit (IEC1<3>)
must be set, the PADCON<15> bit set (IOCON) and the
associated ISFx flag cleared.
When an interrupt request is generated for a pin, the
corresponding status flag (IOCFx register bit) will be
set, indicating that a Change-of-State occurred on that
pin. The IOCFx register bit will remain set until cleared
by writing a zero to it. When any IOCFx flag bit in a
given port is set, the corresponding IOCPxF bit in the
IOCSTAT register will be set. This flag indicates that a
change was detected on one of the bits on the given
port. The IOCPxF flag will be cleared when all
IOCFx<15:0> bits are cleared.
Multiple individual status flags can be cleared by writing
a zero to one or more bits using a Read-Modify-Write
operation. If another edge is detected on a pin whose
status bit is being cleared during the Read-Modify-
Write sequence, the associated change flag will still be
set at the end of the Read-Modify-Write sequence.
The user should use the instruction sequence (or
equivalent) shown in Example 11-1 to clear the
Interrupt-on-Change Status registers.
At the end of this sequence, the W0 register will contain
a zero for each bit for which the port pin had a change
detected. In this way, any indication of a pin changing
will not be lost.
Due to the asynchronous and real-time nature of the
Interrupt-on-Change, the value read on the port pins
may not indicate the state of the port when the change
was detected, as a second change can occur during
the interval between clearing the flag and reading the
port. It is up to the user code to handle this case if it is
a possibility in their application. To keep this interval to
a minimum, it is recommended that any code modifying
the IOCFx registers be run either in the interrupt
handler or with interrupts disabled.
Each Interrupt-on-Change (IOC) pin has both a weak
pull-up and a weak pull-down connected to it. The pull-
ups act as a current source connected to the pin, while
the pull-downs act as a current sink connected to the
pin. These eliminate the need for external resistors
when push button or keypad devices are connected.
The pull-ups and pull-downs are separately enabled
using the IOCPUx registers (for pull-ups) and the
IOCPDx registers (for pull-downs). Each IOC pin has
individual control bits for its pull-up and pull-down. Set-
ting a control bit enables the weak pull-up or pull-down
for the corresponding pin.
Note:
Pull-ups and pull-downs on pins should
always be disabled whenever the pin is
configured as a digital output.
EXAMPLE 11-1: IOC STATUS READ/CLEAR IN ASSEMBLY
MOV 0xFFFF, W0 ; Initial mask value 0xFFFF -> W0
XOR IOCFx, W0 ; W0 has '1' for each bit set in IOCFx
AND IOCFx
; IOCFx & W0 ->IOCFx
EXAMPLE 11-2: PORT READ/WRITE IN ASSEMBLY
MOV
MOV
NOP
BTSS
0xFF00, W0
W0, TRISB
PORTB, #13
; Configure PORTB<15:8> as inputs
; and PORTB<7:0> as outputs
; Delay 1 cycle
; Next Instruction
EXAMPLE 11-3: PORT READ/WRITE IN ‘C’
TRISB = 0xFF00;
Nop();
If (PORTBbits.RB13){ };
// Configure PORTB<15:8> as inputs and PORTB<7:0> as outputs
// Delay 1 cycle
// Next Instruction
DS30010118B-page 128
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