PIC24FJ64GA705 Datasheet, PDF (74/412 Pages) –

PIC24FJ256GA705 FAMILY
6.6.1
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
The user can program one row of Flash program memory
at a time. To do this, it is necessary to erase the 8-row
erase block containing the desired row. The general
process is:
1. Read eight rows of program memory
(1024 instructions) and store in data RAM.
2. Update the program data in RAM with the
desired new data.
3. Erase the block (see Example 6-1):
a) Set the NVMOP<3:0> bits (NVMCON<3:0>)
to ‘0011’ to configure for block erase. Set the
WREN (NVMCON<14>) bit.
b) Write the starting address of the block to
be erased into the NVMADRU/NVMADR
registers.
c) Write 55h to NVMKEY.
d) Write AAh to NVMKEY.
e) Set the WR bit (NVMCON<15>). The erase
cycle begins and the CPU stalls for the dura-
tion of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
4. Update the TBLPAG register to point to the pro-
gramming latches on the device. Update the
NVMADRU/NVMADR registers to point to the
destination in the program memory.
5. Write the first 128 instructions from data RAM into
the program memory buffers (see Table 6-1).
6. Write the program block to Flash memory:
a) Set the NVMOPx bits to ‘0010’ to configure
for row programming. Set the WREN bit.
b) Write 55h to NVMKEY.
c) Write AAh to NVMKEY.
d) Set the WR bit. The programming cycle
begins and the CPU stalls for the duration
of the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
7. Repeat Steps 4 through 6, using the next
available 128 instructions from the block in data
RAM, by incrementing the value in NVMADRU/
NVMADR until all 1024 instructions are written
back to Flash memory.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
must wait for the programming time until programming
is complete. The two instructions following the start of
the programming sequence should be NOPs, as shown
in Example 6-2.
TABLE 6-1: EXAMPLE PAGE ERASE
Step 1: Set the NVMCON register to erase a page.
MOV #0x4003, W0
MOV W0, NVMCON
Step 2: Load the address of the page to be erased into the NVMADR register pair.
MOV #PAGE_ADDR_LO, W0
MOV W0, NVMADR
MOV #PAGE_ADDR_HI, W0
MOV W0, NVMADRU
Step 3: Set the WR bit.
MOV
MOV
MOV
MOV
BSET
NOP
NOP
NOP
#0x55, W0
W0, NVMKEY
#0xAA, W0
W0, NVMKEY
NVMCON, #WR
DS30010118B-page 74
 2016 Microchip Technology Inc.