PIC24FJ64GA705 Datasheet, PDF (247/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 20-6: PMCSxBS: EPMP CHIP SELECT x BASE ADDRESS REGISTER⁽²⁾
R/W⁽¹⁾
bit 15
R/W⁽¹⁾
R/W⁽¹⁾
R/W⁽¹⁾
R/W⁽¹⁾
BASE<23:16>
R/W⁽¹⁾
R/W⁽¹⁾
R/W⁽¹⁾
U-0
U-0
U-0
R/W⁽¹⁾
U-0
U-0
BASE15
—
—
—
BASE11
—
—
bit 7
R/W⁽¹⁾
bit 8
U-0
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-7
bit 6-4
bit 3
bit 2-0
BASE<23:15>: Chip Select x Base Address bits⁽¹⁾
Unimplemented: Read as ‘0’
BASE11: Chip Select x Base Address bit⁽¹⁾
Unimplemented: Read as ‘0’
Note 1: The value at POR is 0080h for PMCS1BS and 8080h for PMCS2BS.
2: If the whole PMCS2BS register is written together as 0x0000, then the last EDS address for the Chip
Select 1 will be FFFFFFh. In this case, Chip Select 2 should not be used. PMCS1BS has no such feature.
 2016 Microchip Technology Inc.
DS30010118B-page 247