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| PIC24FJ64GA705 Datasheet, PDF (42/412 Pages) – | |||
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PIC24FJ256GA705 FAMILY
FIGURE 4-1:
PROGRAM SPACE MEMORY MAP FOR PIC24FJ256GA705 DEVICES
000000h
User Flash Program Memory
Flash Config Words
0xxxFEh(1)
0xxx00h(1)
Unimplemented
Read â0â
Reserved
Executive Code Memory
Reserved
Customer OTP Memory
7FFFFFh
800000h
800100h
800FFEh
801000h
8016FEh
801700h
8017FEh
801800h
Reserved
Flash Write Latches
Reserved
DEVID (2)
Reserved
F9FFFEh
FA0000h
FA00FEh
FA0100h
FEFFFEh
FF0000h
FF0004h
FFFFFFh
Legend: Memory areas are not shown to scale.
Note 1: Exact boundary addresses are determined by the size of the implemented program memory (Table 4-1).
TABLE 4-1: PROGRAM MEMORY SIZES AND BOUNDARIES(2)
Device
Program Memory
Upper Boundary
(Instruction Words)
Write Blocks(1)
Erase Blocks(1)
PIC24FJ256GA70X
02AFFEh (88,064 x 24)
1376
172
PIC24FJ128GA70X
015FFEh (45,056 x 24)
704
88
PIC24FJ64GA70X
00AFFEh (22,528 x 24)
352
44
Note 1: 1 Write Block = 128 Instruction Words; 1 Erase Block (Page) = 1024 Instruction Words.
2: To maintain integer page sizes, the memory sizes are not exactly half of each other.
DS30010118B-page 42
ï£ 2016 Microchip Technology Inc.
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