PIC24FJ64GA705 Datasheet, PDF (216/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 17-11: SPIxURDTL: SPIx UNDERRUN DATA REGISTER LOW
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
URDATA<15:8>
R/W-0
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
URDATA<7:0>
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
URDATA<15:0>: SPIx Underrun Data bits
These bits are only used when URDTEN = 1. This register holds the data to transmit when a Transmit
Underrun condition occurs.
When the MODE<32,16> or WLENGTH<4:0> bits select 16 to 9-bit data, the SPIx only uses
URDATA<15:0>. When the MODE<32,16> or WLENGTH<4:0> bits select 8 to 2-bit data, the SPIx only
uses URDATA<7:0>.
REGISTER 17-12: SPIxURDTH: SPIx UNDERRUN DATA REGISTER HIGH
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
URDATA<31:24>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
URDATA<23:16>
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
URDATA<31:16>: SPIx Underrun Data bits
These bits are only used when URDTEN = 1. This register holds the data to transmit when a Transmit
Underrun condition occurs.
When the MODE<32,16> or WLENGTH<4:0> bits select 32 to 25-bit data, the SPIx only uses
URDATA<31:16>. When the MODE<32,16> or WLENGTH<4:0> bits select 24 to 17-bit data, the SPIx
only uses URDATA<23:16>.
DS30010118B-page 216
 2016 Microchip Technology Inc.