EZ80F91MCU Datasheet, PDF (84/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
65
Interrupt Controller
The interrupt controller on the eZ80F91 device routes the interrupt request signals
from the internal peripherals, external devices (via the internal port I/O), and the
nonmaskable interrupt (NMI) pin to the CPU.
Maskable Interrupts
On the eZ80F91 device, all maskable interrupts use the CPU’s vectored interrupt
function. The size of the I register is modified to 16 bits in the eZ80F91 device, dif-
fering from that of previous versions of the eZ80^® CPU, to allow for a 16 MB range
of interrupt vector table placement. Additionally, the size of the IVECT register is
increased from 8 bits to 9 bits to provide an interrupt vector table that can be
expanded and is more easily integrated with other interrupts.
The vectors are 4 bytes (32 bits) apart, even though only 3 bytes (24 bits) are
required. A fourth byte is implemented for both programmability and expansion
purposes.
Starting the interrupt vectors at 40h allows for easy implementation of the interrupt
controller vectors with the RST vectors. Table 11 lists the low-byte vector for each
of the maskable interrupt sources. The maskable interrupt sources are listed in
order of their priority, with vector 40h being the highest-priority interrupt. In ADL
mode, the full 24-bit interrupt vector is located at starting address {I[15:1],
IVECT[8:0]}, where I[15:0] is the CPU’s Interrupt Page Address Register.
Table 11. Interrupt Vector Sources by Priority
Priority Vector
Source
Priority Vector
Source
0
040h
EMAC Rx
24
0A0h
Port B 0
1
044h
EMAC Tx
25
0A4h
Port B 1
2
048h
EMAC SYS
26
0A8h
Port B 2
3
04Ch
PLL
27
0ACh
Port B 3
4
050h
Flash
28
0B0h
Port B 4
5
054h
Timer 0
29
0B4h
Port B 5
6
058h
Timer 1
30
0B8h
Port B 6
7
05Ch
Timer 2
31
0BCh
Port B 7
8
060h
Timer 3
32
0C0h
Port C 0
Note: *The vector addresses 064h and 068h are left unused to avoid conflict with the nonmaskable
interrupt (NMI) address 066h. The NMI is prioritized higher than all maskable interrupts.
PS019209-0504
PRELIMINARY
Interrupt Controller