EZ80F91MCU Datasheet, PDF (121/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
102
space and a particular Memory Chip Select address space, the Memory Chip
Select is not activated. On-chip RAM is not accessible to external devices during
bus acknowledge cycles.
RAM Control Registers
RAM Control Register
Internal data RAM can be disabled by clearing the GPRAM_EN bit. The default
upon RESET is for RAM to be enabled. See Table 31.
Table 31. RAM Control Register
(RAM_CTL = 00B4h)
Bit
7
6
5
4
3
2
1
0
Reset
1
1
0
0
0
0
0
0
CPU Access
R/W R/W R
R
R
R
R
R
Note: R/W = Read/Write; R = Read Only.
Bit
Position
7
GPRAM_EN
6
ERAM_EN
[5:0]
Value Description
0
On-chip general-purpose RAM is disabled.
1
On-chip general-purpose RAM is enabled.
0
On-chip EMAC RAM is disabled.
1
On-chip EMAC RAM is enabled.
000000 Reserved
PS019209-0504
PRELIMINARY
Random Access Memory