EZ80F91MCU Datasheet, PDF (244/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
225
Table 118. I²C Master Transmit Status Codes
Code I²C State
Microcontroller Response Next I²C Action
18h
Addr+W transmitted For a 7-bit address: write byte Transmit data byte,
ACK received¹
to DATA, clear IFLG
receive ACK.
Or set STA, clear IFLG
Transmit repeated
START.
Or set STP, clear IFLG
Transmit STOP.
Or set STA & STP, clear IFLG Transmit STOP
then START.
For a 10-bit address: write
Transmit extended
extended address byte to data, address byte.
clear IFLG
20h
Addr+W transmitted, Same as code 18h
ACK not received
Same as code 18h.
38h
Arbitration lost
Clear IFLG
Return to idle.
68h
Arbitration lost,
+W received,
ACK transmitted
Or set STA, clear IFLG
Clear IFLG, AAK = 0²
Or clear IFLG, AAK = 1
Transmit START
when bus is free.
Receive data byte,
transmit NACK.
Receive data byte,
transmit ACK.
78h
Arbitration lost,
Same as code 68h
General call address
received, ACK
transmitted
Same as code 68h.
B0h
Arbitration lost,
Write byte to DATA, clear
Transmit last byte,
SLA+R received,
ACK transmitted³
IFLG, clear AAK = 0
Or write byte to DATA, clear
receive ACK.
Transmit data byte,
IFLG, set AAK = 1
receive ACK.
Notes:
1. W is defined as the Write bit; i.e., the lsb is cleared to 0.
2. AAK is an I²C control bit that identifies which ACK signal to transmit.
3. R is defined as the Read bit; i.e., the lsb is set to 1.
If 10-bit addressing is used, the status code is 18h or 20h after the first part of a
10-bit address, plus the Write bit, are successfully transmitted.
After this interrupt is serviced and the second part of the 10-bit address is trans-
mitted, the I2C_SR register contains one of the codes listed in Table 119.
PS019209-0504
PRELIMINARY
I²C Serial I/O Interface