EZ80F91MCU Datasheet, PDF (270/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
251
EMAC Configuration Register 1
The EMAC Configuration Register 1 allows control of the padding, autodetection,
cyclic redundancy checking (CRC) control, full duplex, field length checking, max-
imum packet ignores, and proprietary header options. See Table 137.
Table 137. EMAC Configuration Register 1
(EMAC_CFG1 = 0021h)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
R/W
Bit
Position
7
PADEN
6
ADPADN
5
VLPAD
4
CRCEN
3
FULLD
2
FLCHK
1
HUGEN
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
No padding. Assume all frames presented to EMAC have
proper length.
EMAC pads all short frames by adding zeroes to the end of
the data field. This bit is used in conjunction with ADPADN
and VLPAD.
Disable autodetection.
Enable frame detection by comparing the two octets following
the source address with 0x8100 (VLAN Protocol ID) and pad
accordingly. This bit is ignored if PADEN is cleared to 0.
Do not pad all short frames.
EMAC pads all short frames to 64 bytes and append a valid
CRC. This bit is ignored if PADEN is cleared to 0.
Do not append CRC.
Append CRC to every frame regardless of padding options.
Half-duplex mode. CSMA/CD is enabled.
Enable full duplex mode. CSMA/CD is disabled.
Ignore the length field within Transmit/Receive frames.
Both Transmit and Receive frame lengths are compared to
the length/type field. If the length/type field represents a
length then the frame length check is performed.
Limit the Receive frame-size to the number of bytes specified
in the MAXF[15:0] field.
Allow unlimited sized frames to be received. Ignore the
MAXF[15:0] field.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller