EZ80F91MCU Datasheet, PDF (354/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
335
Op-Code Map
Tables 220 through 226 indicate the hex values for each of the eZ80^® instructions.
Table 220. Op Code Map—First Op Code
Legend
Lower Op Code Nibble
Upper
Op Code
Nibble
4
A
AND
A,H
Mnemonic
First Operand
Second Operand
Lower Nibble (Hex)
0
1
2
3
4
5
6
7
8
9
A
B
0 NOP
LD
BC,
Mmn
LD
(BC),A
INC
BC
INC DEC
B
B
LD
B,n
RLCA
EX
AF,AF’
ADD LD
HL,BC A,(BC)
DEC
BC
1
DJNZ
d
LD
DE,
Mmn
LD
(DE),A
INC
DE
INC DEC
D
D
LD
D,n
RLA
JR ADD LD DEC
d HL,DE A,(DE) DE
2
JR
NZ,d
LD LD
HL, (Mmn),
Mmn HL
INC
HL
INC DEC
H
H
LD
H,n
DAA
JR
Z,d
ADD
HL,HL
LD
HL,
(Mmn)
DEC
HL
3
JR
NC,d
LD LD
SP, (Mmn),
Mmn A
INC
SP
INC
(HL)
DEC
(HL)
LD
(HL),n
SCF
JR
CF,d
ADD
HL,SP
LD
A,
(Mmn)
DEC
SP
4
.SIS
suffix
LD
B,C
LD
B,D
LD
B,E
LD
B,H
LD LD LD
B,L B,(HL) B,A
LD .LIS LD
C,B suffix C,D
LD
C,E
5
LD
D,B
LD .SIL LD
D,C suffix D,E
LD
D,H
LD LD LD
D,L D,(HL) D,A
LD
E,B
LD
E,C
LD .LIL
E,D suffix
6
LD
H,B
LD
H,C
LD
H,D
LD
H,E
LD
H,H
LD LD LD
H,L H,(HL) H,A
LD
L,B
LD
L,C
LD
L,D
LD
L,E
7
LD LD LD LD LD
(HL),B (HL),C (HL),D (HL),E (HL),H
LD
(HL),L
HALT
LD
(HL),A
LD
A,B
LD
A,C
LD
A,D
LD
A,E
8
ADD
A,B
ADD
A,C
ADD
A,D
ADD
A,E
ADD
A,H
ADD ADD ADD
A,L A,(HL) A,A
ADC
A,B
ADC
A,C
ADC
A,D
ADC
A,E
9
SUB
A,B
SUB
A,C
SUB
A,D
SUB
A,E
SUB
A,H
SUB SUB SUB
A,L A,(HL) A,A
SBC
A,B
SBC
A,C
SBC
A,D
SBC
A,E
A
AND
A,B
AND
A,C
AND
A,D
AND
A,E
AND
A,H
AND AND AND
A,L A,(HL) A,A
XOR
A,B
XOR
A,C
XOR
A,D
XOR
A,E
B
OR
A,B
OR
A,C
OR
A,D
OR
A,E
OR
A,H
OR OR OR
A,L A,(HL) A,A
CP
A,B
CP
A,C
CP
A,D
CP
A,E
C
RET
NZ
POP
BC
JP
NZ,
Mmn
JP
Mmn
CALL
NZ,
Mmn
PUSH
BC
ADD
A,n
RST
00h
RET
Z
RET
JP
Z,
Mmn
Table
221
D
RET
NC
POP
DE
JP
NC,
Mmn
OUT
(n),A
CALL
NC,
Mmn
PUSH
DE
SUB
A,n
RST
10h
RET
CF
EXX
JP
CF,
Mmn
IN
A,(n)
E
RET
PO
POP
HL
JP
PO,
Mmn
EX
(SP),HL
CALL
PO,
Mmn
PUSH
HL
AND
A,n
RST
20h
RET
PE
JP
(HL)
JP
PE,
Mmn
EX
DE,HL
F
RET
P
POP
AF
JP
P,
Mmn
DI
CALL
P,
Mmn
PUSH
AF
OR
A,n
RST
30h
RET
M
LD
SP,HL
JP
M,
Mmn
EI
Notes: n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
C
INC
C
INC
E
INC
L
INC
A
LD
C,H
LD
E,H
LD
L,H
LD
A,H
ADC
A,H
SBC
A,H
XOR
A,H
CP
A,H
CALL
Z,
Mmn
CALL
CF,
Mmn
CALL
PE,
Mmn
CALL
M,
Mmn
D
DEC
C
DEC
E
DEC
L
DEC
A
LD
C,L
LD
E,L
LD
L,L
LD
A,L
ADC
A,L
SBC
A,L
XOR
A,L
CP
A,L
CALL
Mmn
Table
222
Table
223
Table
224
E
F
LD
C,n
RRCA
LD
E,n
RRA
LD
L,n
CPL
LD
A,n
CCF
LD
C,(HL)
LD
E,(HL)
LD
L,(HL)
LD
A,(HL)
ADC
A,(HL)
SBC
A,(HL)
XOR
A,(HL)
CP
A,(HL)
LD
C,A
LD
E,A
LD
L,A
LD
A,A
ADC
A,A
SBC
A,A
XOR
A,A
CP
A,A
ADC RST
A,n 08h
SBC RST
A,n 18h
XOR RST
A,n 28h
CP RST
A,n 38h
PS019209-0504
PRELIMINARY
Op-Code Map