EZ80F91MCU Datasheet, PDF (50/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
31
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP BGA
Pin # Pin#
126 B7
Symbol
TxD3
Function
MII Transmit
Data
Signal Direction
Output
127 C7
TxD2
MII Transmit Output
Data
128 D7
TxD1
MII Transmit Output
Data
129 A6
TxD0
MII Transmit Output
Data
130 B6
Tx_EN
MII Transmit Output
Enable
131 C6
Tx_CLK
MII Transmit Input
Clock
132 E7
Tx_ER
MII Transmit Output
Error
133 A5
V_DD
Power Supply
134 B5
V_SS
Ground
Note: *PHY represents the physical layer of the OSI model.
Description
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Enable is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Clock is the
Nibble or Symbol Clock provided
by the MII PHY Interface.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Error is
synchronous to the rising-edge of
Tx_CLK.
Power Supply.
Ground.
PS019209-0504
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