EZ80F91MCU Datasheet, PDF (377/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
358
Table 240. GPIO Port Output Timing
Parameter Abbreviation
T₁
PHI Clock Rise to Port Output Valid Delay
T₂
PHI Clock Rise to Port Output Hold Time
Delay (ns)
Min
Max
—
9.3
2.0
—
External Bus Acknowledge Timing
Table 241 provides information on the bus acknowledge timing.
Table 241. Bus Acknowledge Timing
Parameter Abbreviation
T₁
PHI Clock Rise to BUSACK Assertion Delay
T₂
PHI Clock Rise to BUSACK Deassertion Delay
Delay (ns)
Min
Max
2.8
7.1
2.5
6.5
External System Clock Driver Timing
Table 242 provides timing information for the PHI pin. The PHI pin allows external
peripherals to synchronize with the internal system clock driver on the eZ80F91
device.
Table 242. PHI System Clock Timing
Parameter Abbreviation
T₁
PHI Clock Rise to PHI Rise
T₂
PHI Clock Fall to PHI Fall
Delay (ns)
Min
Max
1.6
4.6
1.8
4.3
PS019209-0504
PRELIMINARY
Electrical Characteristics