EZ80F91MCU Datasheet, PDF (290/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
271
EMAC Boundary Pointer Register—Low and High Bytes
The Boundary Pointer is set to the start of the Receive buffer (end of Transmit
buffer +1) in EMAC shared memory. This pointer is 24 bits and determined by
{RAM_ADDR_U, EMAC_BP_H, EMAC_BP_L}. The upper 3 bits of the
EMAC_BP_H register are hard-wired inside the eZ80F91 device to locate the
base of EMAC shared memory. The last 5 bits of the EMAC_BP_L register value
are hard-wired to keep the addressing aligned to a 32-byte boundary. See
Tables 163 and 164.
Table 163. EMAC Boundary Pointer Register—Low Byte
(EMAC_BP_L = 0044h)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
CPU Access
R/W R/W R/W R
R
R
R
R
Note: R = Read Only, R/W = Read/Write.
Bit
Position
Value
[7:0]
00h–
EMAC_BP_L FFh
Description
These bits represent the Low byte of the 3-byte EMAC
Boundary Pointer value, {EMAC_BP_U, EMAC_BP_H,
EMAC_BP_L}. Bit 7 is bit 7 of the 24-bit value. Bit 0 is bit 0 of
the 24-bit value.
Table 164. EMAC Boundary Pointer Register—High Byte
(EMAC_BP_H = 0045h)
Bit
15:13
Reset
1
1
0
CPU Access
R
R
R
Note: R = Read Only, R/W = Read/Write.
12:8
0
0
0
0
0
R/W R/W R/W R/W R/W
Bit
Position
Value
[7:0]
00h–
EMAC_BP_H FFh
Description
These bits represent the High byte of the 3-byte EMAC
Boundary Pointer value, {EMAC_BP_U, EMAC_BP_H,
EMAC_BP_L}. Bit 7 is bit 15 of the 24-bit value. Bit 0 is bit 8 of
the 24-bit value.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller