EZ80F91MCU Datasheet, PDF (357/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
338
Table 223. Op Code Map—Second Op Code After 0EDh
Legend _{Lower Nibble of 2nd Op Code}
Upper
Nibble
of Second
Op Code
2
4
SBC
HL,BC
Mnemonic
First Operand
Second Operand
Lower Nibble (Hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
IN0
B,(n)
OUT0
(n),B
LEA
BC,
IX+d
LEA
BC,
IY+d
TST
A,B
LD BC, IN0 OUT0
(HL) C,(n) (n),C
TST
A,C
LD
(HL),
BC
1
IN0
D,(n)
OUT0
(n),D
LEA
DE,
IX+d
LEA
DE,
IY+d
TST
A,D
LD DE, IN0 OUT0
(HL) E,(n) (n),E
TST
LD(HL),
A,E
DE
2
IN0
H,(n)
OUT0 LEA HL LEA HL
(n),H ,IX+d ,IY+d
TST
A,H
LD HL, IN0 OUT0
(HL) L,(n) (n),L
TST
A,L
LD
(HL),
HL
3
LD IY, LEA IX LEA IY TST
(HL) ,IX+d ,IY+d A,(HL)
LD IX, IN0 OUT0
(HL) A,(n) (n),A
TST
A,A
LD
(HL),IY
LD
(HL),
IX
4
IN
B,(BC)
OUT
(BC),B
SBC
HL,BC
LD
(Mmn),
BC
NEG
RETN
IM 0
LD
I,A
IN
C,(C)
OUT
(C),C
ADC
HL,BC
LD
BC,
(Mmn)
MLT
BC
RETI
LD
R,A
5
IN
D,(BC)
OUT
(BC),D
SBC
HL,DE
LD
(Mmn),
DE
LEA IX,
IY+d
LEA IY,
IX+d
IM 1
LD
A,I
IN
E,(C)
OUT
(C),E
ADC
HL,DE
LD
DE,
(Mmn)
MLT
DE
IM 2
LD
A,R
6
IBN
H,(C)
OUT
(BC),H
SBC
HL,HL
LD
(Mmn),
HL
TST
A,n
PEA
IX+d
PEA
IY+d
RRD
IN
L,(C)
OUT
(C),L
ADC
HL,HL
LD
HL,
(Mmn)
MLT
HL
LD LD
MB,A A,MB
RLD
7
SBC
HL,SP
LD
(Mmn),
SP
TSTIO
n
SLP
IN
A,(C)
OUT
(C),A
ADC
HL,SP
LD
SP,
(Mmn)
MLT
SP
STMIX RSMIX
8
INIM OTIM INI2
INDM OTDM IND2
9
INIMR OTIMR INI2R
INDMR OTDMR IND2R
A LDI CPI INI OUTI OUTI2
LDD CPD IND OUTD OUTD2
B LDIR CPIR INIR OTIR OTI2R
C
INIRX OTIRX
D
E
LDDR CPDR INDR OTDR OTD2R
LD
I,HL
INDRX OTDRX
LD
HL,I
F
Notes: n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
PS019209-0504
PRELIMINARY
Op-Code Map