EZ80F91MCU Datasheet, PDF (60/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
41
Table 3. Register Map (Continued)
Address
(hex) Mnemonic
Name
Reset
CPU Page
(hex) Access #
Timers and PWM, continued
0078 TMR3_DR_H
Timer 3 Data Register—High Byte
XX
R
143
TMR3_RR_H
Timer 3 Reload Register—High Byte
XX
W
144
0079 PWM_CTL1
PWM Control Register 1
00
R/W 158
007A PWM_CTL2
PWM Control Register 2
00
R/W 159
007B PWM_CTL3
PWM Control Register 3
00
R/W 161
TMR3_CAP_CTL Timer 3 Input Capture Control Register 00
R/W 144
007C PWM0R_L
PWM 0 Rising-Edge Register—Low
XX
R/W 162
Byte
TMR3_CAPA_L
Timer 3 Capture Value A Register—
XX
R/W 145
Low Byte
007D PWM0R_H
PWM 0 Rising-Edge Register—High
XX
R/W 163
Byte
TMR3_CAPA_H
Timer 3 Capture Value A Register—
XX
R/W 146
High Byte
007E PWM1R_L
PWM 1 Rising-Edge Register—Low
XX
R/W 162
Byte
TMR3_CAPB_L
Timer 3 Capture Value B Register—
XX
R/W 146
Low Byte
007F PWM1R_H
PWM 1 Rising-Edge Register—High
XX
R/W 163
Byte
TMR3_CAPB_H
Timer 3 Capture Value B Register—
XX
R/W 147
High Byte
0080 PWM2R_L
PWM 2 Rising-Edge Register—Low
XX
R/W 162
Byte
TMR3_OC_CTL1
Timer 3 Output Compare Control
Register 1
00
R/W 138
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
out reset, the Watch-Dog Timer Control register is reset to 20h.
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
PS019209-0504
PRELIMINARY
Register Map