EZ80F91MCU Datasheet, PDF (318/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
299
ZDI Master Control Register
The ZDI Master Control register provides control of the eZ80F91 device. It is
capable of forcing a RESET and waking up the eZ80F91 from the low-power
modes (HALT or SLEEP). See Table 190.
Table 190. ZDI Master Control Register
(ZDI_MASTER_CTL = 11h in ZDI Register Write Address Spaces)
Bit
Reset
CPU Access
Note: W = Write Only.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
Bit
Position
7
ZDI_RESET
[6:0]
Value Description
0
No action.
1
Initiate a RESET of the eZ80F91. This bit is
automatically cleared at the end of the RESET event.
0000000 Reserved.
PS019209-0504
PRELIMINARY
ZiLOG Debug Interface