EZ80F91MCU Datasheet, PDF (69/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
50
eZ80^® CPU Core
The eZ80^® CPU is the first 8-bit CPU to support 16 MB linear addressing. Each
software module or task under a real-time executive or operating system can
operate in Z80-compatible (64 KB) mode or full 24-bit (16 MB) address mode.
The CPU instruction set is a superset of the instruction sets for the Z80™ and
Z180™ CPUs. Z80 and Z180 programs can be executed on an eZ80^® CPU with
little or no modification.
Features
• Code-compatible with Z80 and Z180 products
• 24-bit linear address space
• Single-cycle instruction fetch
• Pipelined fetch, decode, and execute
• Dual Stack Pointers for ADL (24-bit) and Z80 (16-bit) memory modes
• 24-bit CPU registers and ALU (Arithmetic Logic Unit)
• Debug support
• Nonmaskable Interrupt (NMI), plus support for 128 maskable vectored inter-
rupts
New Instructions
• Loads/unloads the I register with a 16-bit value. These new instructions are:
– LD I,HL (ED C7)
– LD HL,I (ED D7)
For more information on the CPU, its instruction set, and eZ80 programming,
please refer to the eZ80 CPU User Manual (UM0077), available on zilog.com.
PS019209-0504
PRELIMINARY
eZ80^® CPU Core