EZ80F91MCU Datasheet, PDF (61/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
42
Table 3. Register Map (Continued)
Address
(hex) Mnemonic
Name
Reset
CPU Page
(hex) Access #
Timers and PWM, continued
0081 PWM2R_H
PWM 2 Rising-Edge Register—High
XX
R/W 163
Byte
TMR3_OC_CTL2
Timer 3 Output Compare Control
Register 2
00
R/W 138
0082 PWM3R_L
PWM 3 Rising-Edge Register—Low
XX
R/W 162
Byte
TMR3_OC0_L
Timer 3 Output Compare 0 Value
Register—Low Byte
XX
R/W 149
0083
PWM3R_H
TMR3_OC0_H
PWM 3 Rising-Edge Register—High
XX
Byte
Timer 3 Output Compare 0 Value
XX
Register—High Byte
R/W 163
R/W 150
0084 PWM0F_L
PWM 0 Falling-Edge Register—Low
XX
R/W 164
Byte
0085
TMR3_OC1_L
PWM0F_H
Timer 3 Output Compare 1 Value
XX
Register—Low Byte
PWM 0 Falling-Edge Register—High
XX
Byte
R/W 149
R/W 165
TMR3_OC1_H
Timer 3 Output Compare 1 Value
Register—High Byte
XX
R/W 150
0086
PWM1F_L
TMR3_OC2_L
PWM 1 Falling-Edge Register—Low
XX
R/W 164
Byte
Timer 3 Output Compare 2 Value
Register—Low Byte
XX
R/W 149
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
out reset, the Watch-Dog Timer Control register is reset to 20h.
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
PS019209-0504
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Register Map