EZ80F91MCU Datasheet, PDF (135/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
116
Bit
Position
Value Description
[3]
0
BLK3_PROT ₁
Disable Write/Erase Protect on block 18000h to 1FFFFh.
Enable Write/Erase Protect on block 18000h to 1FFFFh.
[2]
0
BLK2_PROT ₁
Disable Write/Erase Protect on block 10000h to 17FFFh.
Enable Write/Erase Protect on block 10000h to 17FFFh.
[1]
0
BLK1_PROT ₁
Disable Write/Erase Protect on block 08000h to 0FFFFh.
Enable Write/Erase Protect on block 08000h to 0FFFFh.
[0]
0
BLK0_PROT ₁
Disable Write/Erase Protect on block 00000h to 07FFFh.
Enable Write/Erase Protect on block 00000h to 07FFFh.
Note: The lower 32 KB block (00000h to 07FFFh—BLK0) is called the Boot Block and can be
protected using the external WP pin.
Flash Interrupt Control Register
There are two sources of interrupts from the Flash controller. These two sources
are:
• Page Erase, Mass Erase, or Row Program completed successfully.
• An error condition occurred
Either or both of these two interrupt sources can be enabled by setting the appro-
priate bits in the Flash Interrupt Control register.
The Flash Interrupt Control register contains four status bits to indicate the follow-
ing error conditions:
Row Program Time-Out. This bit signals a time-out during Row Programming. If
the current row program operation does not complete within 4864 Flash controller
clocks, the Flash controller terminates the row program operation by clearing bit 2
of the Flash Program Control Register and setting the RP_TM0 error bit to 1.
Write Violation. This bit indicates an attempt to write to a protected block of Flash
memory (the Write was not performed).
Page Erase Violation. This bit indicates an attempt to erase a protected block of
Flash memory (the requested page was not erased).
Mass Erase Violation. This bit indicates an attempt to MASS ERASE when there
are one or more protected blocks in Flash memory (the MASS ERASE was not
performed).
PS019209-0504
PRELIMINARY
Flash Memory