EZ80F91MCU Datasheet, PDF (176/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
157
Multi-PWM Power-Trip Mode
When enabled, the Multi-PWM power-trip feature forces the enabled PWM out-
puts to a predetermined state when an interrupt is generated from an external
source via IC0, IC1, IC2, or IC3. One or multiple external interrupt sources can be
enabled at any given time. If multiple sources are enabled, any of the selected
external sources can trigger an interrupt. Configuring the PWM_CTL3 register
enables or disables interrupt sources. See Table 75 on page 161.
The possible interrupt sources for a Multi-PWM power-trip are:
• IC0—digital input
• IC1—digital input
• IC2—digital input
• IC3—digital input
When the power trip is detected, TMR3_PWM_CTL3[PTD] is set to 1 to indicate
detection of the power-trip. A value of 0 signifies that no power-trip is detected.
The PWMs can only be released after a power-trip when
TMR3_PWM_CTL3[PTD] is written back to 0 by software. As a result, the user is
allowed to check the conditions of the motor being controlled before releasing the
PWMs. The explicit release also prevents noise glitches after a power-trip from
causing an accidental exit or reentry of the PWM power-trip state.
The programmable power-trip states of the PWMs are globally grouped for the
PWM outputs and the inverting PWM outputs. Upon detection of a power-trip, the
PWM outputs can be forced to either a High state, a Low state, or tristate. The set-
tings for the power-trip states are made with power-trip control bits
TMR3_PWM_CTL3[PT_LVL], TMR3_PWM_CTL3[PT_LVL_N], and
TMR3_PWM_CTL3[PT_TRI].
PS019209-0504
PRELIMINARY
Programmable Reload Timers