EZ80F91MCU Datasheet, PDF (38/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
19
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP BGA
Pin # Pin#
78 K12
Symbol
PD5
Function
Signal Direction
GPIO Port D Bidirectional
DSR0
79 K11 PD6
Data Set
Ready
Input, Active Low
GPIO Port D Bidirectional
DCD0
80 H8
PD7
Data Carrier Input, Active Low
Detect
GPIO Port D Bidirectional
RI0
Ring Indicator Input, Active Low
81
J11
V_DD
Power Supply
82
J12
V_SS
Ground
Note: *PHY represents the physical layer of the OSI model.
Description
This pin can be used for general-
purpose I/O. It can be individually
programmed as input or output
and can also be used individually
as an interrupt input. Each Port D
pin, when programmed as output,
can be selected to be an open-
drain or open-source output. Port
D is multiplexed with one UART.
Modem status signal to the
UART. This signal is multiplexed
with PD5.
This pin can be used for general-
purpose I/O. It can be individually
programmed as input or output
and can also be used individually
as an interrupt input. Each Port D
pin, when programmed as output,
can be selected to be an open-
drain or open-source output. Port
D is multiplexed with one UART.
Modem status signal to the
UART. This signal is multiplexed
with PD6.
This pin can be used for general-
purpose I/O. It can be individually
programmed as input or output
and can also be used individually
as an interrupt input. Each Port D
pin, when programmed as output,
can be selected to be an open-
drain or open-source output. Port
D is multiplexed with one UART.
Modem status signal to the
UART. This signal is multiplexed
with PD7.
Power Supply.
Ground.
PS019209-0504
PRELIMINARY
Architectural Overview