EZ80F91MCU Datasheet, PDF (226/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
207
interrupt sources. Recommended GPIO Port D control register settings are pro-
vided in Table 109. Refer to the section covering the General-Purpose Input/Out-
put, on page 58 for additional information on setting the GPIO Port modes.
Table 109. GPIO Mode Selection when using the IrDA Encoder/Decoder
GPIO Port D
Bits
PD0
PD1
PD2–PD7
Allowable GPIO
Port Mode
7
7
Any other than GPIO Mode 7
(1, 2, 3, 4, 5, 6, 8, or 9)
Allowable Port Mode Functions
Alternate Function
Alternate Function
Output, Input, Open-Drain, Open-Source, Level-
sensitive Interrupt Input, or Edge-Triggered Interrupt
Input
Loopback Testing
Both internal and external loopback testing can be accomplished with the endec
on the eZ80F91 device. Internal loopback testing is enabled by setting the
LOOP_BACK bit to 1. During internal loopback, the IR_TxD output signal is
inverted and connected on-chip to the IR_RxD input. External loopback testing of
the off-chip IrDA transceiver can be accomplished by transmitting data from the
UART while the receiver is enabled (IR_RxEN set to 1).
Infrared Encoder/Decoder Register
After a RESET, the Infrared Encoder/Decoder Register is set to its default value.
Any Writes to unused register bits are ignored and reads return a value of 0. The
IR_CTL register is described in Table 110.
Table 110. Infrared Encoder/Decoder Control Registers
(IR_CTL = 00BFh)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
CPU Access
R
R
R
R
R R/W R/W R/W
Note: R = Read only; R/W = Read/Write.
Bit
Position
[7:3]
Value Description
00000 Reserved.
PS019209-0504
PRELIMINARY
Infrared Encoder/Decoder